Conventionally, a flash memory has typically been used as a nonvolatile semiconductor storage device.
In this flash memory, as shown in FIG. 28, a floating gate 902, an insulation film 907 and a word line (control gate) 903 are formed in this order via a gate insulation film 908 on a semiconductor substrate 901, and a source line 904 and a bit line 905 respectively constructed of diffusion regions are formed on both sides of the floating gate 902, constituting a memory cell. Around this memory cell are formed element isolation regions 906 (refer to Japanese Patent Laid-Open Publication No. HEI 5-304277).
The memory cell retains storage as the quantity of charge in the floating gate 902. In the memory cell array constructed by arranging the memory cells, the desired memory cell can be subjected to rewrite and read operations by selecting the specified word line and bit line and applying a prescribed voltage to the lines.
The flash memory as described above exhibits a drain current Id to gate voltage Vg characteristic indicated by the solid line curve and the dashed line curve in FIG. 29 when the quantity of charges in the floating gate 902 changes. That is, if the quantity of negative charges in the floating gate 902 is increased, then the characteristic curve changes from the characteristic indicated by the solid line curve to the characteristic indicated by the dashed line curve in FIG. 29, and the Id-Vg curve is displaced roughly parallel in a direction in which the gate voltage Vg increases with respect to same drain current Id with an increase in the threshold voltage.
However, the flash memory as described above has been functionally required to arrange the insulation film 907 that isolates the floating gate 902 from the word line 903 and had difficulties in reducing the thickness of the gate insulation film to prevent the leak of charges from the floating gate 902. Therefore, it has been difficult to effectively reduce the thickness of the insulation film 907 and the gate insulation film, and this has hindered the miniaturization of the memory cell.
Therefore, the semiconductor storage device provided with the memory cell array that employs the aforementioned memory elements as memory cells has the problem that reliable operation cannot be achieved with a further reduced circuit area.
Moreover, the semiconductor storage device that employs the aforementioned memory elements as memory cells in the memory cell array has a problem that a malfunction of rewrite error and so on occurs when the level of the power voltage supplied to the memory circuit including the memory cell array is lowered during the rewrite operation. In this case, the term of “rewrite” means operation that includes at least write or erase.
Moreover, it is required to reduce power consumption in a standby stage in order to increase the operating time on a battery in the portable electronic equipment that employs the memory circuit including the memory cell array. In particular, the memory circuit has had an increasing occupation ratio in recent years in integrated circuits and so on for the purpose of executing real-time processing of motion pictures, and it has been a major problem to reduce the leak current of the memory circuit in the standby state for the long-time operation on the battery.